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Application ReportSPRA953C – December 2003 – Revised April 2016Semiconductor and IC Package Thermal MetricsDarvin Edwards, Hiep NguyenABSTRACTMany thermal metrics exist for semiconductor and integrated circuit (IC) packages ranging from RθJA toΨJT. Often, these thermal metrics are misapplied by those who try to use them to estimate junctiontemperatures in their systems. This document describes traditional and new thermal metrics and puts theirapplication in perspective with respect to system-level junction temperature estimation.12345678ContentsRθJA Junction-to-Ambient and RθJMA Junction-to-Moving Air. 2RθJC Junction-to-Case. 6ΨJT, Junction to Top of Package . 8Rθ(JB) Junction-To-Board . 10ΨJB Junction-to-Board Characterization Parameter . 11Industrial and Commercial Temperature Ranges . 12Miscellaneous Definitions . 12References . 1211s vs 2s2p PCB for Various Packages . 32Die Size Impact on a CSP . 43RθJA vs Pin-to-Pad DistanceList of Figures4567. 4Cu Cold Plate Measurement Process. 6Installing a Heat Sink With Thermocouple . 10Three-Resistor Thermal Approximation Model . 10Rθ(JB) Measurement Method . 11List of Tables1Factors Affecting RθJA for a Given Package Outline . 22Multiplication Factors . 53ΨJT for Typical 128-Pin TQFP Package . 9TrademarksFluoroptic is a registered trademark of Luxtron Corporation.All other trademarks are the property of their respective owners.SPRA953C – December 2003 – Revised April 2016Submit Documentation FeedbackSemiconductor and IC Package Thermal MetricsCopyright 2003–2016, Texas Instruments Incorporated1
RθJA Junction-to-Ambient and RθJMA Junction-to-Moving Air1www.ti.comRθJA Junction-to-Ambient and RθJMA Junction-to-Moving AirThe junction-to-ambient thermal resistance, RθJA, is the most commonly reported thermal metric and is themost often misused. RθJA is a measure of the thermal performance of an IC package mounted on aspecific test coupon. The intent of RθJA is to give a metric by which the relative thermal performance of apackage can be compared. Thus, the thermal performance of a TI device can be compared to a devicefrom another company. This is true when both companies use a standardized test to measure RθJA, suchas that specified by JEDEC in the EIA/JESD51-x series of documents. Sometimes, however, JEDECconditions are not followed and the excursions from the standards are not documented. These testvariations can have a dramatic effect on the measured values of RθJA. Therefore, unless test conditionsare reported with the RθJA value, they should be considered suspect.The measurement of RθJA is performed using the following steps (summarized from EIA/JESD51-1, -2, -5,-6, -7, and -9):Step 1. A device, usually an integrated circuit (IC) package containing a thermal test chip that canboth dissipate power and measure the maximum chip temperature, is mounted on a testboard.Step 2. The temperature sensing component of the test chip is calibrated.Step 3. The package- and test-board system is placed in either a still air (RθJA) or moving air (RθJMA)environment.Step 4. A known power is dissipated in the test chip.Step 5. After steady state is reached, the junction temperature is measured.Step 6. The difference in measured ambient temperature compared to the measured junctiontemperature is calculated and is divided by the dissipated power, giving a value for RθJA in C/W.1.1UsageUnfortunately, RθJA has often been used by system designers to estimate junction temperatures of theirdevices when used in their systems. The equation usually assumed to be valid for calculating junctiontemperature from RθJA is:(TJ TA R qJA Power)(1)This is a misapplication of the RθJA thermal parameter because RθJA is a variable function of not just thepackage, but of many other system level characteristics such as the design and layout of the printedcircuit board (PCB) on which the part is mounted. In effect, the test board is a heat sink that is soldered tothe leads of the device. Changing the design or configuration of the test board changes the efficiency ofthe heat sink and therefore the measured RθJA. In fact, in still-air JEDEC-defined RθJA measurements,almost 70%–95% of the power generated by the chip is dissipated from the test board, not from thesurfaces of the package. Because a system board rarely approximates the test coupon used to determineRθJA, application of RθJA using Equation 1 results in extremely erroneous values.Table 1 lists factors that can influence RθJA for a given package outline when all materials are heldconstant. The first column lists the factor while the second column gives a rule of thumb estimate as to theimpact of the factor.Table 1. Factors Affecting RθJA for a Given Package Outline2Factors Affecting RθJAStrength of Influence (rule of thumb)PCB designStrong (100%)Chip or pad sizeStrong (50%)Internal package geometrical configurationStrong (35%)AltitudeStrong (18%)External ambient temperatureWeak (7%)Power dissipationWeak (3%)Semiconductor and IC Package Thermal MetricsSPRA953C – December 2003 – Revised April 2016Submit Documentation FeedbackCopyright 2003–2016, Texas Instruments Incorporated
RθJA Junction-to-Ambient and RθJMA Junction-to-Moving Airwww.ti.comIn light of the fact that RθJA is not a characteristic of the package by itself but of the package, PCB, andother environmental factors, it is best used as a comparison of package thermal performance betweendifferent companies. For example, if TI reports an RθJA of 40 C/W for a package compared to acompetitor's value of 45 C/W, the TI part will likely run 10% cooler in an application than the competitor'spart.1.2Test Card ImpactJEDEC has established a set of standards for measuring and reporting the thermal performance of ICpackages. These standards fall under the EIA/JESD51 umbrella. EIAJ/Semi also has a set of thermalstandards that are substantially different from the JEDEC version. RθJA is not a constant; therefore, it iscritical to determine the standards that were used to calculate or measure RθJA before attempting acomparison.Within the JEDEC specification, two test board types are allowed. A 1s (single signal layer) configurationgives a typical usage value for a moderately populated, multi-plane system-level PCB application. A 2s2p(double signal layer, double buried power plane) configuration gives a best case performance estimateassuming a sparsely populated, high-trace-density board design with buried power and ground planes.Figure 1 shows modeled RθJA differences for these two boards for 17 different package types. Note that allthe materials and package geometries were held constant for these models.216108806070504050403030% ShiftJ/A (5C/W)60202010SOIC 8 CuSOJ LOC 32 CuSOJ LOC 32 A42PLCC 84 CuPLCC 68 CuPLCC 28 CuPLCC 20 CuQFP 240 CuQFP 208 H.S.QFP 208 CuQFP 160 A 42QFP 132 A 42QFP 120 A 42QFP 100 CuDip 24 CuDip 20 Cu0QFP 132 C100Package Type1s2s2p% ShiftFigure 1. 1s vs 2s2p PCB for Various PackagesAs shown, as much as a 50% RθJA variation can be expected as a function of 1s vs 2s2p test cardconstruction alone.1.3Die Size ImpactThe chip or die pad inside a package can perform the same function as a heat spreader if the chip or padis large enough. The function of the heat spreader is twofold. First, it spreads energy from the hot spot ofthe chip over a wider area on the package surface, thereby increasing convective energy loss. Second, itincreases heat transfer from the pad to the lead fingers or to the package balls, which then conduct theheat to the PCB. Figure 2 shows the impact of die size on RθJA for a tape-based area array chip scalepackage (CSP). As shown, the RθJA for this package changes almost 8 with die size. It is important to remeasure or recalculate RθJA for a package if a die shrink is planned.SPRA953C – December 2003 – Revised April 2016Submit Documentation FeedbackSemiconductor and IC Package Thermal MetricsCopyright 2003–2016, Texas Instruments Incorporated3
RqJA ( C/W)RθJA Junction-to-Ambient and RθJMA Junction-to-Moving ie Size (mm)1012Figure 2. Die Size Impact on a CSP1.4Internal Package Geometrical ConfigurationThis topic refers to the layout within a package, be it a traditional lead frame package, small pad (S-pad)package, lead-on-chip (LOC), or ball grid array (BGA) package. More mundane geometrical configurationscan also have a major impact on the package thermal performance. These can include the distancebetween the tips of the lead in the package and the die pad as shown in Figure 3, or even the downsetbetween the pad and lead fingers. The latter is an especially important thermal criterion in thin packages.In BGAs, design of the interposer trace configuration is important in spreading heat from the die to thepackage balls where it is conducted into the PCB.RqJA ( C/W)302826242220 0.500.511.5Pin-to-Pad Distance (mm)Figure 3. RθJA vs Pin-to-Pad Distance4Semiconductor and IC Package Thermal MetricsSPRA953C – December 2003 – Revised April 2016Submit Documentation FeedbackCopyright 2003–2016, Texas Instruments Incorporated
RθJA Junction-to-Ambient and RθJMA Junction-to-Moving Airwww.ti.com1.5AltitudeAs the air pressure of the ambient environment changes with altitude, the cooling efficiency of the air alsochanges. IBM [1] showed that a device is expected to run 20% hotter at 8000 ft compared to the samedevice operating at sea level. Other investigators have shown large shifts in fan performance and internalchassis air flow when used at different altitudes. These effects should be considered, especially when thesystem design is marginal from a thermal standpoint. Many major system companies have pressurechambers that are used to test their systems at various effective altitudes. Usually, these companiesinstrument their designs to measure internal component temperatures when operating at differentatmospheric pressures. Table 2 lists multiplication factors taken from the IBM work to derate RθJA valuesdetermined at sea level.Table 2. Multiplication FactorsAltitude nt TemperatureAmbient temperature has a great effect on convective and radiative heat transfer. Because thermalradiation varies with 4th power of temperature (T4), radiative heat transfer is significantly enhanced astemperature increases. On the contrary, convective heat transfer suffers with increasing temperature asthe air is less dense at higher temperature. Generally, the effect of radiation is much higher than that offree convection. Experiments in the TI thermal lab show about a 10%–20% improvement in RθJA whenmeasured between an ambient of 0 C–100 C; that is, RθJA at 100 C ambient is about 20% lower than theRθJA at 0 C ambient.1.7Power DissipationThe surface temperature of the device drives both convection and radiation energy loss from the package.The hotter the package surface becomes, the more efficient convection and radiation heat loss to theambient environment. Therefore, RθJA decreases with increasing power dissipation from a package. Forvery low power dissipation which results in minimal increase in surface temperature, RθJA is sometimesfound to be 2 –3x higher than at rated package power levels.1.8RθJA EffectiveTheta-ja (RθJA) is a system-level parameter that depends strongly on system parameters as described inthe previous sections; therefore, it is sometimes useful to define an RθJA(effective), which is simply the RθJA ofthe device operating in the system of interest. If RθJA(effective) can be estimated from thermal modeling ormeasurements in the system, it is possible to use Equation 1 to calculate the junction temperatureassuming the power of the surrounding components on the system does not change. Equation 1 thenbecomes:(TJ TA R qJA (effective ) Power)(2)The system conditions leading to an RθJA(effective) value should always be defined when reporting RθJA(effective).SPRA953C – December 2003 – Revised April 2016Submit Documentation FeedbackSemiconductor and IC Package Thermal MetricsCopyright 2003–2016, Texas Instruments Incorporated5
RθJC Junction-to-Case2www.ti.comRθJC Junction-to-CaseThe junction-to-case thermal resistance metric was originally devised to allow estimation of the thermalperformance of a package when a heat sink was attached. EIA/JESD51-1 states that RθJC is, “the thermalresistance from the operating portion of a semiconductor device to outside surface of the package (case)closest to the chip mounting area when that same surface is properly heat sunk so as to minimizetemperature variation across that surface.” Though no current JEDEC specification is available definingRθJC, a fairly universal industry practice exists for measuring RθJC. This method is described in the followingsection. The SEMI Standard G43-87 describes a fluid immersion method for measuring RθJC. Though TIhas used this method in the past, it only has historical value and is not detailed here.2.1Copper (Cu) Cold Plate RθJC MeasurementThis method forces almost all the power of the test device through a defined surface of the package.Depending on how a heat sink will be applied to the device, this may be the top or bottom of the package.Most generally, it is the top surface of the package. RθJC is good to determine the thermal resistancebetween the die and the surface onto which a heat sink is to be mounted.Summarized, the procedure is:Step 1. An IC package normally containing a thermal test chip is mounted on a test PCB. This isnormally a JEDEC-defined low-k 1s0p PCB which has low copper content to minimize heatloss though the PCB.Step 2. The package is pressure fit to a Cu cold plate (a copper block with circulating constanttemperature fluid) with the leads facing up and the case against the cold plate when the topof the case is to be measured. Otherwise, a Cu cold plate contact to the bottom of thepackage is provided through the PCB when the primary cooling path of the package isthrough a soldered plate into the PCB.Step 3. Silicone thermal grease or other thermal interface material provides thermal couplingbetween the cold plate and package.Step 4. Insulation is provided around the test coupon to minimize parasitic heat loss.Step 5. Power is applied to the device.Step 6. The junction temperature of the test chip is measured.Step 7. The temperature of the package surface in contact with the cold plate is measured by athermocouple or other temperature sensor pressed against this surface.Step 8. RθJC is calculated by dividing the measured temperature delta by the dissipated power.Test CouponThermal GreaseICCoolant InCold PlateCoolant OutThermocoupleFigure 4. Cu Cold Plate Measurement Process2.2RθJC ApplicationThe old and obsolete understanding of RθJC is shown in Equation 3.R qJA R qJC R qCA6Semiconductor and IC Package Thermal Metrics(3)SPRA953C – December 2003 – Revised April 2016Submit Documentation FeedbackCopyright 2003–2016, Texas Instruments Incorporated
RθJC Junction-to-Casewww.ti.comHere, the package thermal performance RθJA is reported to be the sum of two resistances: RθJC and RθCA.RθCA stands for the case-to-ambient thermal resistance, which was defined by this equation. This mighthave been a valid equation for packages with metal cans, which were relatively at a constant temperatureand were not thermally coupled to the PCB. But, these conditions do not apply with today’s plastic orceramic packages that are tightly coupled to the PCB. Large thermal gradients are common acrossmodern packages, so the meaning of Equation 3 is questionable.A traditional, but invalid, usage of RθJC is to calculate the junction temperatures of chips operating in asystem. Case temperatures of devices operating in the system are measured using thermocouples, IRcameras, or Fluoroptic probes. Equation 4 is then mistakenly used to calculate the junction temperature:Equation 4:(TJ TC R qJC Power)(4)The fallacy here is that only a very small percentage of heat energy in a typical plastic package isconvected and radiated off the top surface of the package. Many models have shown 60%-95% of thermalenergy from a chip is actually convected and radiated off the PCB to which the package is attached. If oneassumes the entire power is dissipated by the top surface, the junction temperature calculated byEquation 4 is higher than reality. In designs with thermal margin, this is a nuisance, but in designs withoutthermal margin, erroneous limitations might be imposed. This limitation of RθJC is overcome by the newthermal metric, ΨJT, which is described below.Equation 5 shows the proper application of RθJC for those instances when a high-efficiency heat sink isapplied to the top surface of a device for which RθJC is small compared to RθJA:(5)Here, Rθ(SA) is the heat sink-to-ambient performance of the heat sink and Rθ(CS) is the case-to-heat sinkthermal resistance of the thermal interface material (see Equation 7). The ambient temperature is at thelocation used for characterizing Rθ(SA), usually some distance away from the heat sink. This equation is themost accurate for packages where RθJC is small compared to RθJA, meaning that most of the heat can bedissipated through the top surface of the package when a sufficiently efficient heat sink is applied.Equation 6 shows an approximation that is more accurate than Equation 5 for any combination of RθJA,RθJC, or Rθ(SA) if RθJA is known for the system configuration:æ R qJA R qJC R q(CS) R q(SA) ö PowerTJ @ TA çç R qJA R qJC R q(CS) R q(SA) èø(6)(2.3)Rθ(CS)The best method for calculating Rθ(CS) is to actually measure the Rθ(CS) value, but if this is not possible,Equation 7 can be used to estimate Rθ(CS). Note that this is merely an estimate, because the thermalinterfacial resistance that can be developed between any two surfaces is neglected.TR q(CS) k A(7)where:T k A 2.4The thickness of interface layer between package and heat sinkThe bulk thermal conductivity of the thermal interface materialThe area over which the thermal interface material is appliedRθJC(top) and RθJC(bot)Some packages have mechanisms such as heat slugs or exposed pads to remove heat from the top,bottom, or both surfaces of the package. When only a single surface is used for heat removal, this is thesurface that would be used for RθJC based on the EIA/JESD51-1 specification. Sometimes, designers wishalso to include heat sinks on the top of the package, even if the exposed pads are soldered to the PCB. Insuch instances, it is appropriate to define RθJC(top) and RθJC(bot) to avoid confusion over which surface isSPRA953C – December 2003 – Revised April 2016Submit Documentation FeedbackSemiconductor and IC Package Thermal MetricsCopyright 2003–2016, Texas Instruments Incorporated7
ΨJT, Junction to Top of Packagewww.ti.combeing referenced. The top surface is the surface of the package facing away from the PCB, whereas thebottom surface is the surface of the package facing toward the PCB. When RθJC(bot) is to be measured, aspecial PCB is constructed with a cutout to allow contact between the bottom package surface and Cucold plate. When in contact with the Cu cold plate, the temperature taken at the bottom surface of thepackage becomes the case temperature that is used in calculating the temperature delta between thecase and junction temperature.It should be noted that Texas Instruments has at times used the nomenclature of Rθ(JP), or junction-to-pad,to refer to the thermal resistance between the junction and exposed pad of the package. Thisnomenclature has been used regardless of whether the pad was exposed on the top or bottom of thepackage.3ΨJT, Junction to Top of PackageIn an attempt to provide the user community with a thermal metric to estimate in-use junctiontemperatures from measured case temperatures, a new thermal metric, ΨJT, has been adopted by theindustry (JESD51-2). The metric is defined by the Greek character psi (Ψ) rather than theta (θ) becauseΨJT is not a true thermal resistance.The measurement procedure for ΨJT is summarized from JESD 51-2 as follows:Step 1. Mount a test package, usually containing a thermal test die, on a test board.Step 2. Glue a fine gauge thermocouple wire (36 gauge or smaller) to top center of package.Step 3. Dress the thermocouple wire along package to minimize heat sinking nature of thermocouple.Step 4. Dissipate power in test die.Step 5. Measure the test die junction temperature and thermocouple temperature.Step 6. Divide the thermal gradient between the junction temperature and surface temperature by thedissipated power.Why is ΨJT not a true thermal resistance? In the above procedure, the heat energy generated by the testdie is allowed to flow normally along preferential thermal conduction paths. The quantity of heat flowingfrom the die to the top of the package is actually unknown in the measurement, but is assumed to be thetotal power of the device for the purposes of ΨJT calculation. Clearly, this assumption is invalid, but whencalculated this way, ΨJT becomes a very useful number because the experimental configuration is muchlike the application environment of the IC package. As such, the amount of energy flowing from the die tothe top of the package during test is similar to the partitioning of the energy flow in an applicationenvironment. In comparison to Equation 4, the actual junction temperature can be very closely estimatedusing Equation 8:TJ TC ( Y JT Power )(8)For plastic packages, ΨJT is typically 0.5 C/W–2 C/W compared to RθJC values of 4 C/W–15 C/W. Thinnerpackages have smaller ΨJT values than thicker packages. Packages with embedded heat slugs have ΨJTvalues close to zero. You should be aware that ΨJT varies with both board construction and air flowconditions as shown in Table 3. The values in Table 3 were obtained through modeling.8Semiconductor and IC Package Thermal MetricsSPRA953C – December 2003 – Revised April 2016Submit Documentation FeedbackCopyright 2003–2016, Texas Instruments Incorporated
ΨJT, Junction to Top of Packagewww.ti.comTable 3. ΨJT for Typical 128-Pin TQFP Package(1)(2)(3)(4)(5)(6)(7)(8)(9)(10)(11)(1) (2) (3) (4) (5) (6) (7) (8)DIE PADPCB TYPE (9)AIR FLOW (LFM)ΨJTExposed1s0p00.22Exposed 2p xposed1s0p2500.31Non-exposed2s2p2500.23Size, type, pin: 14 mm 14 mm 1.1 mm, TQFP, 128Die size: 8.4 mm 8.3 mmDie thickness: 0.31 mm for exposed pad; 0.28 mm for non-exposedDie pad size: 10.5 mm 9.2 mm 0.15 mmDie attach impedance: 5.77 C-mm2/WMold compound thermal conductivity: 0.9 W/m-KAmbient temperature: 25 CPower dissipation: 1 WSize: 114.3 mm 76.2 mm 1.6 mmThermal vias: 9 9 connecting die pad to ground plane (only for 2s2p PCB with exposed pad)Type: JEDEC high-k (2s2p) and low-k (1s0p) as defined in JESD 51-7 and JESD 51-3, respectively3.1Case Temperature MeasurementThe case temperature is defined as the hottest temperature on the top of the device. In most instances,this is at the center of the top surface or lid of the device. The case temperature measurement can beperformed with (in order of accuracy) an IR camera, a fluor-optic probe, a thermocouple, or IR gun with amaximum field view of 4-mm diameter just to name a few techniques. When a thermocouple is chosen asthe technique to perform the measurement, a fine gauge wire (36 to 40 gauge, J or K wire) should beused to minimize the local cooling from the thermocouple. You should be aware that if the casetemperature is measured by a gauge thermocouple larger than 36, the thermocouple sinks heat awayfrom the surface, cooling the spot that is being measured, invalidating the calculation of Equation 8. Theimpact of using a heavy-gauge thermocouple to measure the package top surface can be very substantial,reducing the delta between the ambient and actual surface temperature by 50% or more. There can beerror even when a 36 gauge or smaller thermocouple is employed.If using a thermocouple, it should be attached to the center of the package surface ( 1 mm) with a beadof thermally conductive epoxy no larger than 2 2 mm on a side. Taping the thermocouple to the packagesurface is not recommended. To minimize the heat sinking nature of the thermocouple, the wire should bedressed along the diagonal of the package, down to the PCB surface, and over a minimum distance of 25mm before lifting from the PCB. The thermocouple wire can be tacked to the PCB for this routing purposeby using a tape. Use of improper thermocouple wire gauge can create errors in the measurements of5%–50%.When using either an IR camera or IR gun, be sure to correct the reading for the emissivity of the surfacebeing investigated. For details, see the documentation for the instrument being used.Measuring case temperatures with heat sinks applied represents special challenges because the heat sinkcovers the surface to be measured. If you wish to measure the case temperature with a heat sink applied,the following procedure is recommended (see Figure 5).Step 1. Drill a hole less than 1 mm in diameter in the heat sink so the hole is at the center of thepackage when the heat sink is attached. Chamfer the end of the hole on the face of the heatsink that mates with the package. The chamfer should be sized to accommodate the epoxythat will attach the thermocouple to the package.Step 2. Thread a fine-gauge (less than 36-gauge) thermocouple through the drilled hole from the topof the heat sink.Step 3. Use epoxy to attach the thermocouple bead to the package top surface with thermocouplewire oriented perpendicular to the package top surface. Wait for the epoxy to cure.SPRA953C – December 2003 – Revised April 2016Submit Documentation FeedbackSemiconductor and IC Package Thermal MetricsCopyright 2003–2016, Texas Instruments Incorporated9
ΨJT, Junction to Top of PackageStep 4.Step 5.www.ti.comApply heat sink compound to the base of the heat sink.With the thermocouple wire still threaded through the drill hole, carefully slide the heat sinkonto the top of the package.ThermocoupleHeat SinkChamfered HoleHeat Sink CompoundThermally Conductive EpoxyPackageFigure 5. Installing a Heat Sink With Thermocouple3.2ΨJT vs RθJC When Using Heat SinksΨJT should not be used when application of a heat sink is intended. Instead, Equation 5 and Equation 6should be used.4Rθ(JB) Junction-To-BoardThe junction-to-board thermal resistance, or junction-to-pin thermal resistance, attempts to represent thethermal resistance between the package and the board with one number. In reality, the resistancebetween the junction and board is distributed, with different resistance paths such as the junction-to-pin-toboard and the junction-through-plastic-through-air-to-board. Furthermore, the concept of RθJB implies thatthe board temperature under the device is uniform temperature (single node), which is erroneous.Nevertheless, a single thermal metric like Rθ(JB) is useful for a first-pass estimation of junction temperaturebased on the following simple three-resistor thermal approximation as shown in Figure 6. In this model,the resistance from the junction-to-board is simply the Rθ(JB) value. The resistance between the junctionand case surface is simply the RθJC value. The ambient resistance, Rθ(a), is calculated from the convectiveheat loss and radiation loss from the top of the package.Ambient NodeAmbient RaSurface Nodeqjc Calculated/Measured RJunction 1qjb Calculated/Measured RPC BoardFigure 6. Three-Resistor Thermal Approximation Model10Semiconductor and IC Package Thermal MetricsSPRA953C – December 2003 – Revised April 2016Submit Documentation FeedbackCopyright 2003–2016, Texas Instruments Incorporated
Rθ(JB) Junction-To-Boardwww.ti.com4.1Rθ(JB) Measurement MethodThe primary method to measure Rθ(JB) is as follows:Step 1. A test package containing a thermal test die is mounted on a test board.Step 2. A fine wire thermocouple (36–40 gauge) is glued or soldered to the device pin closest to thedie. In the case of BGA packages, the thermocouple is soldered or glued to the trace exitingfrom under the package edge that is closest to the die.Step 3. The board is clamped in a special double cold plate fixture with insulation between thepackage and the cold plate surfaces, but with thermal contact between the cold plate and theboard. The cold plate heat sinks the PCB.Step 4. Power
Step 1. A device, usually an integrated circuit (IC) package containing a thermal test chip that can both dissipate power and measure the maximum chip temperature, is mounted on a test board. Step 2. The temperature sensing component of the test chip is calibrated. . QFP 100 Cu QFP 120 A-42 QFP 132 A-42 QFP 132 C QFP 160 A-42 QFP 208 Cu QFP .
