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Application ReportSPRA829 - July 2002DSP/BIOS Timers and Benchmarking TipsHarish Thampi SSoftware Development SystemsABSTRACTDigital signal processors (DSPs) typically have one or more on-chip timers that generatehardware interrupts at periodic intervals. DSP/BIOS normally uses one of the availableon-chip timers as a source for its system clock. The on-chip timer can also be used togenerate periodic hardware interrupts from the user application. DSP/BIOS also has a PRDmodule that allows the user to trigger periodic functions based on events that are triggeredby certain sources. This application report describes the DSP/BIOS timers, clock (CLK), andperiodic function (PRD) modules of DSP/BIOS. This document also explains how toconfigure a periodic function, and how to configure an on-chip timer to generate periodichardware interrupts. The report also gives some tips on benchmarking with regard to thetimers and the clock module. Examples that run on TMS320C6711 DSP starter kit (DSK) andTMS320C5402 DSK are included. The examples demonstrate how to configure timers, andperiodic and clock functions using the configuration tool.Contents12Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2DSP/BIOS Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32.1 DSP On-Chip Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32.2 Timer Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42.3 Configuring the On-Chip Timer to Generate Periodic Hardware Interrupts . . . . . . . . . . . . . . . . 43DSP/BIOS System Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83.1 System Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83.2 High- and Low-Resolution Times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83.3 Clock Functions and Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93.4 Configuring and Understanding a CLK Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104DSP/BIOS PRDs and Periodic Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114.1 The PRD Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114.2 PRD Functions and Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124.3 Configuring and Understanding a Periodic Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145Benchmarking Tips . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165.1 Why Tips on Benchmarking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165.2 Timer-Free Runs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165.3 Benefits of Instrumentation APIs Over Profiler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165.4 Limitations of CLK gethtime/CLK getltime . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175.5 Timer ISR Overhead . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 186References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18Appendix A Hello.c listing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19DSP/BIOS is a trademark of Texas Instruments.Trademarks are the property of their respective owners.1

SPRA829List of FiguresFigure 1. Relation Between Timers, PRDs, and CLKs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3Figure 2. Timer Object Properties (a) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5Figure 3. Timer Object Properties (b) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5Figure 4. Timer Device Properties . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6Figure 5. HWI INT15 Properties . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7Figure 6. Clock Function Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10Figure 7. CLK Manager Properties . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11Figure 8. PRD Function Sequence (a) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13Figure 9. PRD Function Sequence (b) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14Figure 10. PRD Manager Properties . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15List of TablesTable 1. Timer Clock for DSPs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4Table 2. Timer Clock for DSPs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81IntroductionDigital signal processors typically have one or more on-chip timers that generate hardwareinterrupt at periodic intervals. DSP/BIOS normally uses one of the available on-chip timers as asource for its system clock. The on-chip timer can also be used to generate periodic hardwareinterrupts from the user application. DSP/BIOS also has a PRD module that allows the user totrigger periodic functions based on events that are triggered by certain sources. The purpose ofthis application report is to help DSP/BIOS users to understand more about the system clock,understand the difference between a clock function and a PRD function, and also learn how touse the on-chip timer to generate periodic interrupts for a user application. The document alsogives some tips on benchmarking with regard to the timers and the clock module. Examples thatrun on TMS320C6711 DSK and TMS320C5402 DSK are included. The examples demonstratehow to configure timers, and periodic and clock functions using the configuration tool. Theessence of what is covered in this application report is described in Figure 1. After going throughthis application report, you will be able to understand the relation between the DSP/BIOS systemclock, PRDs, and timers.2DSP/BIOS Timers and Benchmarking Tips

SPRA829CPU clockrateN 4 for 67xN 8 for 64xN (TDDR 1) for C5000BNHigh resolution clocktimer counter registerTimer periodregisterBLow resolutionclockCLK obj’s.Default 1Coppied inCLK startup(),after main()Alternatively callprogrammaticallyAlternatively callprogrammaticallyInterruptSystemtickSystem clockPRD tick()BiggestcommondivisorDefaultTSK tick() 1System alarmclockPRD SWIUsed byTimer period(taken from .cdb,hard coded in .asm)Read from timerPRD registerfor 54xPRD Obj’s.TSK sleep() timeoutSEM pend() timeoutTSK time()CLK managerFigure 1. Relation Between Timers, PRDs, and CLKsBy default, an on-chip timer drives the DSP/BIOS system clock. Alternatively, It may also bedriven by an external source. The DSP/BIOS application programming interfaces (APIs) get thetimer period values from the configuration files, except for TMS320C54x , where the value isactually read from the PRD register. The on-chip timers are driven by the divided-down centralprocessing unit (CPU) clock. The divide-down ratio for the various TI chips is shown in Figure 1.2DSP/BIOS Timers2.1DSP On-Chip TimersDigital signal processors typically have one or more on-chip timers that generate the hardwareinterrupt at periodic intervals. They can be used to time or count events, generate pulses orinterrupt the CPU. The timers have two signaling modes, and can be clocked by an externalclock or the CPU clock. By default they are clocked internally. The timer output can beconfigured as a timer output or a general-purpose output. When an internal clock drives thetimer, the frequency on the timer input clock varies across the processor generations. Table 1gives the timer input frequency for different TI chips as a ratio of the CPU clocking rate.TMS320C54x is a trademark of Texas Instruments.DSP/BIOS Timers and Benchmarking Tips3

SPRA829Table 1. Timer Clock for 0C64xTMS320C54x/C55xTimer input clock frequencyCPU rate / 4CPU rate / 4CPU rate / 8CPU rate / (TDDR 1)2.2Timer OperationFor TMS320C6000 devices, the on-chip timer has a period count register (PRD), timer countregister (CNT), and a timer control register (CTL). The timer’s CTL register contains the controlbits for configuring the timer. It also contains bits for setting the mode of operation, input source,and function. Apart from setting the appropriate values in the control register (CTL), the timerperiod value is set in the timer PRD register. When the timer starts from reset, the timer CNTregister is incremented once every tick of the timer input clock. When the value in the timer CNTregister equals the timer PRD register, the timer is reset to 0 in the next CPU clock. Thus, thecounter counts from 0 to the value set in the timer PRD register. Every time the timer CNTregister value equals the value of the timer PRD register, a timer interrupt occurs. In the defaultconfiguration, this timer interrupt advances the DSP/BIOS system clock by one tick.For TMS320C5000 devices the on-chip timer has a period count register (PRD), timer register(TIM), and a timer control register (TCR). Bits 0 to 3 of the TCR is for the timer divide-down ratio(TDDR) field, and bits 6 to 9 are for the prescalar (PSC) field. Unlike the C6000 devices, wherethe CPU clock is divided by a fixed value and fed to the timer input, C5000 devices make useof the TDDR value to divide down the CPU clock. The value in the TDDR field specifies thedivide-down ratio of the CPU clock. The value in TDDR is copied to the prescaler counter (PSC)field and decremented on each CPU clock tick. Whenever the PSC reaches zero, the value inTDDR is reloaded to PSC, and the TIM register is decremented by one. When the TIM registerreaches zero, a timer interrupt is triggered and the value in PRD is reloaded to the TIM register.Effectively, the CPU clock is divided by (TDDR 1) and fed to the timer.2.3Configuring the On-Chip Timer to Generate Periodic Hardware InterruptsThis section shows how to configure the on-chip timer 1 to generate periodic hardware interruptson a TMS320C6711DSK. Copy the hello2 example, shipped with Code Composer Studio andavailable in the folder install directory \tutorials\dsk6711\hello2, to the myprojects directory,and open the hello2 project. Open the configuration file of the hello2 project, and in the ChipSupport Library (CSL) section of the configuration file, expand TIMER – Timer Device. Thereare two subsections: a TIMER Configuration Manager and a TIMER Resource Manager.Right-click on the TIMER Configuration Manager, and insert a timercfg object called “timercfg0”.Right-click, and select the properties of the new timercfg object. In the properties window, theGeneral tab can be ignored; it has only a comment field. Choose the Pin Control tab, and setthe FUNC field to “timer output”. This sets the TOUT pin to be used as a timer output. The valuein the INVOUT does not matter because the internal CPU clock is used here. Now select theCounter Control tab, and set the value of 0x2000 in the Period Value field. This means that thetimer interrupt will occur every time the timer CNT register reaches 0x2000. The counter value isoptional. The Timer Operation field determines the state of the timer. It can be set to start whenreset, or restart or start with the reset option. Select the “start with reset” option.TMS320C6000, TMS320C5000, C6000, C5000, and Code Composer Studio are trademarks of Texas Instruments.4DSP/BIOS Timers and Benchmarking Tips

SPRA829Now, move on to the Clock Control tab. In the CLKSRC field, you can select the source of thetimer input clock. Select (CPU clock)/4 option because for the TMS3206711 DSK, the timer inputclock is one-fourth the frequency on the CPU clock. The timer can be set to run in clock mode orpulse mode by the appropriate selection of the CP field. Select clock mode. If pulse mode isselected, the pulse width will have to be specified. Move on to the Advanced tab. The PRD andCNT fields will reflect the values in the Counter control tab. In this section, you need toconfigure the timer control register appropriately. Set the timer control register to 0x3C1. Thisfield will be automatically set according the settings selected in the properties window. The valueof 0x3C1 in the timer control register will set the clock source to internal clock, operating modeto clock mode, TOUT pin to be a timer output, HLD to 1, and the GO bit to one. Since the HLDand GO bits are set to 1, the timer is reset, and it starts counting from 0. Apply the settings. SeeFigure 2 and Figure 3.Figure 2. Timer Object Properties (a)Figure 3. Timer Object Properties (b)DSP/BIOS Timers and Benchmarking Tips5

SPRA829You have now configured the timer object; however, this does not mean that the timer itself isconfigured. To configure the timer, expand the TIMER – Resource Manger list. You areconfiguring timer 1, so right-click on Timer Device1, and select “properties”. In the propertieswindow, click to select the “Open Timer Device” option; this will activate the edit box to inputname of timer handle. Use the default handle name “hTimer1”. Now select the “EnablePre-initialization” option. This activates the “Pre-initialization with” drop-down options. Select thetimercfg0 from the list of available options. Apply the settings. This will make sure that timer 1 isconfigured according to the settings in the configuration object, timerCfg0. See Figure 4.Figure 4. Timer Device PropertiesAt this point, you have finished configuring timer 1 on the chip. To generate periodic hardwareinterrupts, you need to tie this interrupt to one of the hardware interrupt manager (HWI) objects.Open the properties window of HWI INT15. Set the “interrupt source” to Timer 1 and the timerISR “function” to timer isr (). Note the use of a leading underscore, as this interrupt serviceroutine (ISR) is written as a C function. The leading underscore is required because theC compiler places a leading underscore to all C symbols during compilation. In the Dispatchertab of the HWI INT15 properties, select the “Use Dispatcher” option so that DSP/BIOS will takecare of the context save operation. See Figure 5.6DSP/BIOS Timers and Benchmarking Tips

SPRA829Figure 5. HWI INT15 PropertiesIn the global settings of the configuration file, select CSL as “6711”, and define the symbolCHIP 6711 in the project build options. In the file hello.c, define the ISR function as shownbelow. This ISR will be invoked every 0x2000 ticks of the timer clock.Void timer isr (Void){LOG printf (&trace, “In a timer 1 ISR”);}In the same file, include the following CSL header files related to the CSL and timer.#include csl.h #include csl timer.h Declare the global variable as shown below. This variable is used to store the timer event ID.static Uint32 TimerEventId1;Now, inside the function main (), add the following lines of code. The code fragment below willget the timer event ID of timer 1, enable the particular timer event, and then start the timer:TimerEventId1 TIMER getEventId (hTimer1);IRQ enable (TimerEventId1);TIMER start (hTimer1);Save and build the hello2 project. Load and run the executable. You can see that timer isr () isinvoked periodically. The interval at which the timer 1 interrupt occurs is described below:TMS320C6711 CPU clock period 1/150 Mhz 6.67 nsTimer 1 input clock 1/150 Mhz) * 4 26.67 nsDSP/BIOS Timers and Benchmarking Tips7

SPRA829Timer 1 period 0x2000 8192Time period for timer 1 interrupt 8192 * (1/150 Mhz) * 4 218.45 usNow the hello2 project has a timer1 ISR that is invoked every 218.45us. So, the log output wouldbe like the one shown below. The complete source code listing of hello.c is given in Appendix A.0In a timer 1 ISRConfiguring the on-chip timer to generate periodic hardware interrupts on a TMS320C5402 DSKis very similar to that on a TMS320C6711 DSK. The only difference is that you can specify thetimer divide-down ratio (TDDR). In the example provided with this application report, the TDDRvalue is set to zero. So, the timer will be driven by the DSP clock at 100Mhz. The PRD registerof the timer is set to 0x55f0, which is equal to 22000 DSP clock ticks. So, the timer interrupt willoccur every 22000 ticks of the DSP clock, which is equal to 220us. In the C5000 example, youtie the timer interrupt to HWI SINT7. You need to use the dispatcher for HWI SINT7.3DSP/BIOS System Clock3.1System ClockDSP/BIOS need a heartbeat because many of its APIs have a time-out parameter. Thisheartbeat is called the system clock. The system clock tick is different from the DSP clock tick.Apart from the system clock, DSP/BIOS provides a high- and low-resolution time. These clocksare used to measure passage of time, to generate time-stamp messages, and serve as thedefault heartbeats for driving the execution of periodic function.DSPs typically have more than one on-chip timer that generates hardware interrupts at periodicintervals. DSP/BIOS normally uses one of these available on-chip timers as a source for itson-chip system clock. In the default configuration, the system clock has the same value as thelow-resolution time. There is no requirement that the system clock needs to be driven by anon-chip timer. An external clock, or an ISR triggered by an on-chip peripheral, can drive thesystem instead of the timer. The functioning of the system clock is explained in detail insection 3.3. The pre-configured CLK object, PRD clock, can be removed from the DSP/BIOSconfiguration. To do this, un-check the “Use CLK Manager to drive PRD” option in the PRDobjects “General Properties” window.If an external clock is used, it should call PRD tick () to advance the system clock. The systemclock can also be triggered by a periodic interrupt from an on-chip peripheral. In this case theinterrupt’s hardware ISR needs to call PRD tick ().3.2High- and Low-Resolution TimesThe on-chip timer has two registers called timer period register (PRD) and timer counter register(CNT). The high- and low-resolution times are dependent on these two registers. The timer CNTregister increments by one every four CPU clock ticks in the case of TMS320C6711. Thefrequency at which the timer CNT increment depends on the DSP generation. See Table 2.Table 2. Timer Clock for 0C64xTMS320C54x/C55xTimer input clock frequencyCPU rate / 4CPU rate / 4CPU rate / 8CPU rate / (TDDR 1)8DSP/BIOS Timers and Benchmarking Tips

SPRA829When the value in the timer CNT register equals the value in the timer PRD register, the timerCNT register is reset to zero, and a timer interrupt is generated. DSP/BIOS increments thekernel variable CLK R time, whenever a timer interrupt occurs. The low-resolution time can beobtained by calling the API CLK getltime (). It returns the number of timer interrupts that hadoccurred until the point of time when the API was called. The high-resolution time gives a moreprecise value by multiplying the number of timer interrupts held in CLK R time with the timerperiod, and adding the value of the timer CNT register to it. This gives a time with resolution veryclose to one instruction cycle. Potential timer counter rollover during the process of registerreads will appropriately compensated before returning the high-resolution timer value to theuser. The low-resolution time is used to add time stamps to event logs when the events happenover a long period of time. The high-resolution time is used in conjunction with STS set () andSTS delta () APIs to benchmark code. It can also be used for adding time stamps to event logs.When the timer period is set to 0xFFFF on the C5000 and 0xFFFFFFFF on the C6000 devices,an optimized version of CLK gethtime and CLK getltime is used by DSP/BIOS:CLK R time Number of timer interruptsLow-resolution time CLK R timeHigh-resolution time ( CLK R time * Timer PRD ) Timer CNT3.3Clock Functions and OperationThe CLK module provides four APIs: CLK gethtime (), CLK getltime (), CLK countspms (), andCLK getprd (). The first two have already been discussed in the previous section. TheAPI CLK countspms () returns the programmed number of hardware timer register ticks permillisecond, while the CLK getprd () returns the configured timer PRD register value. Thehardware interrupt 14 is tied to the timer 0 interrupt by default. Also by default, the DSP/BIOSsystem clock is tied to timer 0.When a timer interrupt occurs, the ISR corresponding to HWI INT14 is run. CLK F isr () is theISR that is invoked when the timer interrupt happens. CLK F isr () does some basic interruptservice operations, increments CLK R time (low-resolution clock), transfers control to clockhook functions that eventually return to the context where the interrupt occurred. The hookfunctions are wrapped with prescribed (HWI enter, HWI exit) hardware interrupt prolog andepilog. The usually used hook function is the CLK F run () function, which basically calls afunction FXN F run (). The function FXN F run () calls all the configured clock functions insequence. So, when a timer interrupt occurs, all the clock functions are executed in the contextof the hardware ISR. Therefore, the amount of processing done by any CLK function should beminimal, and these functions may invoke only the DSP/BIOS APIs that are allowable from anISR. The default PRD clock () is explained in section 4.2. Figure 6 explains the sequence ofoperations that takes place in the event of a timer interrupt. The box “CLK functions” denotes allthe clock functions configured. See Figure 6 for the CLK function execution sequence.DSP/BIOS Timers and Benchmarking Tips9

SPRA829Timer interruptCLK F isr()CLK F run()CLK function 1HWI enter()CLK function 2FXN F run()CLK function NHWI exit()DSP/BIOS internalUser CLK functionsFigure 6. Clock Function Sequence3.4Configuring and Understanding a CLK FunctionIn this section, you will configure a clock function that will be executed every 50us. Open theconfiguration file hello.cdb. Right-click on CLK – Clock Manager, and select properties. In theproperties window, the CPU interrupt is set to HWI INT14 by default. Also, the clock is set to betriggered by on-chip timer 0. In the microsecond/Int field, enter the value 50. This value specifiesthe time period at which the timer interrupt should occur. Setting the microseconds/Int field setsthe PRD register with an appropriate value. Alternatively, you can set the timer period registerdirectly by selecting the Directly Configure on-chip timer register option. Apply the setting, andnow the timer 0 is configured to interrupt every 50us. This means that the DSP/BIOS systemclock will tick every 50us and, therefore, all the configured CLK functions will be executed every50us. When you set the microseconds/Int field to 50us, the PRD register field and Instruction perinterrupt field are set automatically. The DSP speed in Mhz serves as the basis reference for thiscomputation. These values are calculated as follows:Microseconds/Int 50us 50 * 10–6Time for 1 DSP clock tick 1 / (150 * 106) 10–6 / 150Time for 1 PRD register increment 4 / (150 * 106) (4 * 10–6) / 150Number of PRD increments in 50us (50 * 10–6 * 150) / (4 * 10–6) 1875 7500 DSP clocksAgain, right-click on the CLK – Clock Manager and select Insert CLK. After inserting a CLKobject, you may rename the object if you wish to. Now right click the newly created CLK object,CLK0, and tie up a clock function, my clock (), to this CLK object. A leading underscore shouldbe added to the function name if it is written in C. Apply the settings and, at this point, you havefinished configuring a clock function. See Figure 7.10DSP/BIOS Timers and Benchmarking Tips

SPRA829Figure 7. CLK Manager PropertiesNow, in the file hello.c, define the function my clock () as follows:Void my clock (Void){LOG printf (&trace, ”In clock function my clock ()”);}Save and build the hello2 project. Load the executable. Run the program, and you can see thatthe function, my clock (), is called repeatedly from the LOG window transcript.4DSP/BIOS PRDs and Periodic Functions4.1The PRD ModuleThe main purpose of the PRD module is to manage PRD objects that represent individualprogram functions that execute periodically, based on events that are triggered by certainsources. These periodic functions can be either time-based or space-based. Time-basedfunctions are triggered by timer interrupts. This means that the PRD module uses the DSP/BIOSclock. In this scenario, the option “Use CLK Manager to drive PRD” in the PRD – PeriodicFunction Manager is enabled. Enabling this option introduces a new CLK object PRD clock.Space-based functions are the ones that are triggered by events such as input/output (I/O)availability or other programmatic events. Activation of the PRD module is driven by regular callsto the kernel function PRD F tick ().DSP/BIOS Timers and Benchmarking Tips11

SPRA829The PRD module may be driven by the system clock or by calls to PRD F tick () from specificevents. The same period counter, PRD D tick, drives all the PRD objects configured. Eachobject can execute its functions at different intervals, based on the period counter. Thedifference between PRD and CLK functions is that CLK functions get executed at the frequencyof DSP/BIOS system clock ticks, while PRD allows the functions to be executed repeatedly atany multiple of system clock ticks. Another difference is that the CLK functions are executed inthe context of a hardware interrupt, while PRD functions are executed in the context of asoftware interrupt. DSP/BIOS allows the user to drive the task manager (TSK) module with PRDby enabling the check box in the Task Manager properties.4.2PRD Functions and OperationThe period of a function is the time between successive invocations. It is expressed in terms ofticks, where a single tick is defined as a single invocation of the PRD F tick () function. So, ifthe period for a function ‘f’ is set to be ‘n’, then PRD module invokes the function ‘f’ once every‘n’ calls to the PRD F tick () function. The DSP/BIOS API PRD tick () internally callsPRD F tick () to increment the variable PRD D tick. The PRD module executes in the contextof a special software interrupt object automatically created by the DSP/BIOS configuration tool.This software interrupt is implicitly posted through calls to PRD F tick (). The configuration toolautomatically inserts a PRD swi object when a PRD object is created. It is the PRD swi thatinvokes the configured periodic functions. When there are no periodic functions configured, thePRD swi is automatically removed.The two main functions in the PRD module are PRD F swi () and PRD F tick (). PRD F swi ()is the function that is bound to the software interrupt posted by the PRD F tick () function. Theconfiguration tool uses PRD swi as the name for the software interrupt that binds and callsPRD F swi (). When the target program is loaded, PRD swi is statically stored in thePRD D swihandle variable. The PRD module uses a software interrupt (swi) object (calledPRD swi by default), which itself is triggered on a periodic basis to manage execution of PRDobjects. The PRD swi is posted only if the PRD D tick is equal to the greatest common divisorthat is a power of two of the periods of all the configured PRD functions. You can get a betterperformance of PRDs if the tick value of the PRD functions is a multiple of 2. For example, ifthere are two PRD functions that have period values of 1024 and 1025, the PRD swi will beposted every cycle. If the tick values are 1024 and 512, the PRD swi will be posted only onceevery 512 ticks. Thus, in the latter case, the overhead of running the PRD swi for every tickis reduced.PRD Obj has a “count” field in it. PRD F swi () decrements the value in the count field of all“enabled” PRD objects. If the count field value of any PRD object reaches 0 or a value less than0, the function bound to the PRD object is executed, and the PRD object’s count field isreloaded with the value in its “period” field, if it is a continuous PRD. PRD F tick () is a functionthat increments the PRD timer count, PRD D timer. See Figure 8 and Figure 9.12DSP/BIOS Timers and Benchmarking Tips

SPRA829Timer interruptCLK F isr()CLK F run()HWI enter()CLK function 1CLK function 2FXN F run()PRD Ftick()NoPRDfunctionconfigured?CLK function NUser CLK functionsYesSWI post(PRD swi)NoTSKtick drivenby PRD?YesTSK tick()HWI exit()DSP/BIOS internalFigure 8. PR

the CPU clock is divided by a fixed value and fed to the timer input, C5000 devices make use of the TDDR value to divide down the CPU clock. The value in the TDDR field specifies the divide-down ratio of the CPU clock. The value in TDDR is copied to the prescaler counter (PSC) field